`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer: 
// 
// Create Date:    19:25:14 12/11/2008 
// Design Name: 
// Module Name:    memoryMapped 
// Project Name: 
// Target Devices: 
// Tool versions: 
// Description: 
//
// Dependencies: 
//
// Revision: 
// Revision 0.01 - File Created
// Additional Comments: 
//
//////////////////////////////////////////////////////////////////////////////////
module memoryMapped(
    input [15:0] memData,
    input [15:0] controller1Data,
    output reg [15:0] memDataOut,
	 output reg memEnable,
    input [2:0] address2,
	 input en,
    input controller2,
    input [15:0] controller2Data
    );
always@(*)
begin
	if(address2)
	begin
		memEnable <= 0;
		
		if(controller2)
			memDataOut <= controller2Data;
		else
			memDataOut <= controller1Data;
	end
	else
	begin
		memDataOut <= memData;
		memEnable <= en;
	end	
end
endmodule
